
An AI Agent Just Designed a Complete CPU From Scratch. It Took 12 Hours and a 219-Word Prompt.
Startup Verkor.io claims its agentic AI system produced a working RISC-V processor core from specification to layout, matching a 2011-era Intel chip. The design files will be released publicly this month.
A startup called Verkor.io says it has done something no one has publicly demonstrated before: it used an autonomous AI agent system to design a complete RISC-V CPU core from scratch, taking a 219-word specification document and producing a verified, fabrication-ready design in 12 hours.
The chip, called VerCore, runs at 1.48 GHz and achieves a CoreMark benchmark score of 3,261. That puts it in the same performance range as an Intel Celeron SU2300, a processor from 2011. It is not going to power your next laptop. But that is not the point. The point is that an AI system just did in half a day what used to take a team of human engineers months to accomplish.
IEEE Spectrum published the first detailed technical analysis of the system this week.
How It Works
Verkor's system is called Design Conductor. It is not an AI model itself but a harness for large language models. A harness is software that forces an AI agent to proceed through structured steps, the same steps a human chip design team would follow: specification analysis, register-transfer level design, implementation, testing, power delivery, signal timing, and physical layout.
"What we learned is that the better approach is to let the AI agent solve the whole problem," co-founder Suresh Krishna told IEEE Spectrum. Previous efforts in AI chip design focused on using specialized AI systems for individual tasks within the design pipeline. Design Conductor takes the opposite approach: one autonomous workflow from spec to a GDSII file, the standard output format used by chip fabrication facilities.
The system manages subagents, a database of design files, and calls external tools like the open-source OpenROAD suite for layout tasks. Founding engineer Ravi Krishna described the workflow as "mirrored after the traditional process a human engineer might use." The critical difference is speed and iteration. The system analyzes, writes, debugs, checks, and repeats across all design stages autonomously.
The Caveats Are Real
VerCore has not been physically manufactured. It was verified in simulation using Spike, the reference RISC-V ISA simulator, and laid out using the open-source ASAP7 PDK, an academic design kit that simulates a 7-nanometer production node. Both tools are standard in RISC-V development. Verkor says the CPU can run a variant of uCLinux in simulation.
The performance is modest. A 2011-era chip is not going to impress anyone shopping for raw compute. And some design tasks cannot be easily parallelized, meaning you cannot just throw more AI agents at the problem to speed it up linearly.
But the trajectory matters more than the current result. Ravi Krishna noted that just last year, the AI models they were using could not build a floating-point multiplier. The VerCore design was completed in December 2025. "If it can't do it today, it'll do it in six months," he said. "I don't know if that's a scary thing or a good thing."
Why This Matters Beyond the Lab
RISC-V is an open-standard instruction set architecture that is gaining traction because it is free to use. RISC-V chips are generally not as fast as their x86 and Arm counterparts, but they cost less and carry no licensing fees. If AI agents can reliably produce RISC-V designs at low cost, it opens the door to custom silicon for applications that currently do not justify the expense of a human design team.
The major electronic design automation (EDA) companies, Synopsys and Cadence, have their own agentic AI tools for chip design. But those tools automate individual tasks within the pipeline. Design Conductor is built to handle the entire process end to end. Neither Synopsys nor Cadence has publicly claimed that level of autonomy.
Verkor plans to release the VerCore design files at the end of April and will demonstrate an FPGA implementation at DAC, the leading electronic design automation conference. Skeptics will get their chance to verify the claims. But if the design holds up, this is the clearest signal yet that chip architecture is joining the growing list of engineering disciplines where AI agents are not just assisting humans but replacing the workflow entirely.
The full Design Conductor paper is available on arXiv. Tom's Hardware and TechSpot provided additional reporting.